AI data movement
AI traffic is synchronized, burst-heavy and intolerant of unpredictable delay. SIDERA approaches the fabric as part of the compute system—designed for effective bandwidth, observability and operational control.
The network challenge
Bandwidth is essential. Predictability, fast recovery and visibility determine how much of that bandwidth becomes useful work.
Collective operations can drive many accelerators toward the same destination at the same time, filling queues faster than conventional fabrics can react.
Protect shared buffers and coordinate congestion response.A small number of delayed flows can hold back an entire distributed job, extending completion time and reducing accelerator utilization.
Engineer for predictable flow completion—not only peak throughput.Static hashing can concentrate elephant flows on a subset of links while capacity remains unused elsewhere in the fabric.
Use workload-aware telemetry and dynamic path selection.Multi-tenant clusters need performance isolation so one workload does not create unpredictable loss or latency for another.
Segment, meter and observe traffic across the end-to-end path.Device counters alone rarely show how the network affects a training step, checkpoint or inference pipeline.
Correlate fabric, endpoint and workload signals.Every additional tier, retimer and optical link consumes power that could otherwise support compute.
Favor efficient silicon, high radix and flatter designs where appropriate.The SIDERA approach
The architecture combines efficient switch silicon, flexible traffic management, open network software and end-to-end telemetry with a regional integration and support model.
Explore data center switches →Adapt pipeline behavior and resource allocation as AI protocols and workload patterns evolve.
Design lossless Ethernet, queue policy and load distribution around endpoint and application behavior.
Expose high-frequency telemetry for faster correlation, fault isolation and capacity decisions.
Use SONiC/SAI-based options, hardened through testing, security reinforcement and lifecycle engineering.
Modify platform, software, mechanics and management interfaces for project requirements.
Three dimensions of scale
AI infrastructure increasingly spans three connectivity domains. Each has different latency, bandwidth and failure-model requirements.
Very high-bandwidth accelerator interconnects coordinate tightly coupled processing within a system or rack.
Ethernet connects GPU servers, storage and services through leaf-spine fabrics designed for collective traffic.
Longer-distance connectivity coordinates capacity, data and operations across sites while respecting latency and resiliency constraints.
First platform, open architecture
Xsight Labs’ X2 combines 12.8 Tbps switching, 100G SerDes, sub-700 ns latency and a programmable architecture with SONiC/SAI, SDK and P4 integration paths. SIDERA’s initial portfolio applies this foundation to high-capacity data center systems.
Silicon specifications are published by Xsight Labs. Final system performance and port configuration depend on the selected SIDERA platform.
Portfolio roadmap
Next-generation SIDERA platforms are planned around Marvell Teralynx technology, extending the portfolio toward lower-power, high-density switching for increasingly flat AI fabrics.
Read about Teralynx T100 ↗Fabric architecture
Architecture review · Custom configurations · Regional support
